CAIAZZI, TOMMASO
CAIAZZI, TOMMASO
Dipartimento di Ingegneria civile, informatica e delle tecnologie aeronautiche
A High-Speed Stateful Packet Processing Approach for Tbps Programmable Switches
2023-01-01 Scazzariello, M.; Caiazzi, T.; Ghasemirahni, H.; Barbette, T.; Kostic, D.; Chiesa, M.
Achieving Best-path Selection at Line Rate through the SRv6 Live-Live Behavior
2024-01-01 Polverini, M.; Cianfrani, A.; Caiazzi, T.; Scazzariello, M.; Abdelsalam, A.; Filsfils, C.; Camarillo, P.
Kathará: A Lightweight Network Emulation System
2020-01-01 Scazzariello, M.; Ariemma, L.; Caiazzi, T.
Millions of Low-latency State Insertions on ASIC Switches
2023-01-01 Caiazzi, Tommaso; Scazzariello, Mariano; Chiesa, Marco
MRT: A Fast Multi-Threaded MRT Parser
2021-01-01 Ariemma, L.; Scazzariello, M.; Caiazzi, T.
Nesting Containers for Faithful Datacenters Emulations
2023-01-01 Caiazzi, Tommaso; Scazzariello, Mariano; Quinzi, Samuele; Ariemma, Lorenzo; Patrignani, Maurizio; Battista, Giuseppe Di
Sibyl: A Framework for Evaluating the Implementation of Routing Protocols in Fat-Trees
2022-01-01 Caiazzi, T.; Scazzariello, M.; Alberro, L.; Ariemma, L.; Castro, A.; Grampin, E.; Di Battista, G.
SRv6 Meets DetNet: A New Behavior for Low Latency and High Reliability
In corso di stampa Polverini, Marco; Cianfrani, Antonio; Caiazzi, Tommaso; Scazzariello, Mariano
VFTGen: A Tool to Perform Experiments in Virtual Fat Tree Topologies
2021-01-01 Caiazzi, T.; Scazzariello, M.; Ariemma, L.
| Titolo | Data di pubblicazione | Autore(i) | File |
|---|---|---|---|
| A High-Speed Stateful Packet Processing Approach for Tbps Programmable Switches | 1-gen-2023 | Scazzariello, M.; Caiazzi, T.; Ghasemirahni, H.; Barbette, T.; Kostic, D.; Chiesa, M. | |
| Achieving Best-path Selection at Line Rate through the SRv6 Live-Live Behavior | 1-gen-2024 | Polverini, M.; Cianfrani, A.; Caiazzi, T.; Scazzariello, M.; Abdelsalam, A.; Filsfils, C.; Camarillo, P. | |
| Kathará: A Lightweight Network Emulation System | 1-gen-2020 | Scazzariello, M.; Ariemma, L.; Caiazzi, T. | |
| Millions of Low-latency State Insertions on ASIC Switches | 1-gen-2023 | Caiazzi, Tommaso; Scazzariello, Mariano; Chiesa, Marco | |
| MRT: A Fast Multi-Threaded MRT Parser | 1-gen-2021 | Ariemma, L.; Scazzariello, M.; Caiazzi, T. | |
| Nesting Containers for Faithful Datacenters Emulations | 1-gen-2023 | Caiazzi, Tommaso; Scazzariello, Mariano; Quinzi, Samuele; Ariemma, Lorenzo; Patrignani, Maurizio; Battista, Giuseppe Di | |
| Sibyl: A Framework for Evaluating the Implementation of Routing Protocols in Fat-Trees | 1-gen-2022 | Caiazzi, T.; Scazzariello, M.; Alberro, L.; Ariemma, L.; Castro, A.; Grampin, E.; Di Battista, G. | |
| SRv6 Meets DetNet: A New Behavior for Low Latency and High Reliability | In corso di stampa | Polverini, Marco; Cianfrani, Antonio; Caiazzi, Tommaso; Scazzariello, Mariano | |
| VFTGen: A Tool to Perform Experiments in Virtual Fat Tree Topologies | 1-gen-2021 | Caiazzi, T.; Scazzariello, M.; Ariemma, L. |