We report on the fabrication and characterization of Schottky barrier transistors on polycrystalline silicon. The transistors were realized exploiting Cr-Si and Ti-Si Schottky barrier with a low thermal budget process, compatible with polymeric, ultraflexible substrates. We obtained devices with threshold voltages as low as 1.7 V (for n channel) and 4 V (for p channel) with channel lengths ranging from 2 to 40 μm. Resulting on/off ratios are as high as 5 · 103. The devices showed threshold voltages and subthreshold slopes comparable with already published N- and P-MOS devices realized with the same process on polyimide substrates thus representing a cheaper and scalable alternative to ultraflexible transistors with doped source and drain.
De Iacovo, A., Ferrone, A., Colace, L., Minotti, A., Maiolo, L., & Pecora, A. (2016). Schottky Barrier Thin Film Transistor (SB-TFT) on low-temperature polycrystalline silicon. SOLID-STATE ELECTRONICS, 126, 1-4 [10.1016/j.sse.2016.10.001].
Titolo: | Schottky Barrier Thin Film Transistor (SB-TFT) on low-temperature polycrystalline silicon | |
Autori: | ||
Data di pubblicazione: | 2016 | |
Rivista: | ||
Citazione: | De Iacovo, A., Ferrone, A., Colace, L., Minotti, A., Maiolo, L., & Pecora, A. (2016). Schottky Barrier Thin Film Transistor (SB-TFT) on low-temperature polycrystalline silicon. SOLID-STATE ELECTRONICS, 126, 1-4 [10.1016/j.sse.2016.10.001]. | |
Handle: | http://hdl.handle.net/11590/312628 | |
Appare nelle tipologie: | 1.1 Articolo in rivista |