Engineered Coalescence by Annealing 3D Ge Microstructures into High-Quality Suspended Layers on Si

The move from dimensional to functional scaling in microelectronics has led to renewed interest toward integration of Ge on Si. In this work, simulation-driven experiments leading to high-quality suspended Ge films on Si pillars are reported. Starting from an array of micrometric Ge crystals, the film is obtained by exploiting their temperature-driven coalescence across nanometric gaps. The merging process is simulated by means of a suitable surface-diffusion model within a phase-field approach. The successful comparison between experimental and simulated data demonstrates that the morphological evolution is driven purely by the lowering of surface-curvature gradients. This allows for fine control over the final morphology to be attained. At fixed annealing time and temperature, perfectly merged films are obtained from Ge crystals grown at low temperature (450 °C), whereas some void regions still persist for crystals grown at higher temperature (500 °C) due to their different initial morphology. The latter condition, however, looks very promising for possible applications. Indeed, scanning tunneling electron microscopy and high-resolution transmission electron microscopy analyses show that, at least during the first stages of merging, the developing film is free from threading dislocations. The present findings, thus, introduce a promising path to integrate Ge layers on Si with a low dislocation density