A simplified architecture of subranging pure linear folding ADC is proposed. The device is based on the folding idea to eliminate the DAC, the summing node and the amplifier, fundamental elements of the classical architecture, replacing them by means of an analogical signal preprocessing parallel structure named “channels”. The presented circuit in addition to the advantage of a reduction of total conversion time than a classical subranging ADC, so approaching ADC flashes, is very simple and easy to build. An accurate simulation of the single channels and of the whole structure validate the idea. A first discrete circuit it has been realized and tested.
Leccese, F. (2008). A simplified 3 –bits discrete pure linear analog preprocessing folding ADC architecture. In 16th IMEKO TC4 Int. Symp.: Exploring New Frontiers of Instrum. and Methods for Electrical and Electronic Measurements; 13th TC21 Int. Workshop on ADC Modelling and Testing - Joint Session, Proc. (pp.1011-1016).
A simplified 3 –bits discrete pure linear analog preprocessing folding ADC architecture
LECCESE, Fabio
2008-01-01
Abstract
A simplified architecture of subranging pure linear folding ADC is proposed. The device is based on the folding idea to eliminate the DAC, the summing node and the amplifier, fundamental elements of the classical architecture, replacing them by means of an analogical signal preprocessing parallel structure named “channels”. The presented circuit in addition to the advantage of a reduction of total conversion time than a classical subranging ADC, so approaching ADC flashes, is very simple and easy to build. An accurate simulation of the single channels and of the whole structure validate the idea. A first discrete circuit it has been realized and tested.I documenti in IRIS sono protetti da copyright e tutti i diritti sono riservati, salvo diversa indicazione.
