Benvenuti nell'Anagrafe della Ricerca d'Ateneo

Impact of Control-Plane Uplink in Asymmetric RF/RIS-Aided VLC Indoor Systems

Analysis and Operation of Two-Stage Isolated ISOP Converter with Partial Power Processing for Fast EV Charging

One of the main challenges in the deployment of electric vehicles (EVs) as a sustainable alternative to conventional fossil fuel-powered vehicles is the need for the fast EV charging infrastructure. To meet the high power requirement of a fast charger that exceeds 300 kW, modular topologies are employed for the fast charging power converter. In this paper, a modular two-stage input-series-output-parallel (ISOP) architecture is proposed for the DC Fast charging unit, providing both isolation a...

PMSM Power-Hardware-in-the-Loop Emulation using LCL coupling network

The adoption of Power Hardware in the Loop (PHIL) has been appearing has an enhanced technic to test and validate control algorithms for electrical machines. It uses the advantages of hardware testing and simulation by interfacing the Device Under Test (DUT) hardware with numerical simulations. This paper presents the use of the PHIL for the emulation of a Permanent Magnet Synchronous Machine (PMSM) using a LCL coupling network with a RLC damping circuit. The modeling and derivation of the eq...

Multi-SIN Based Real-Time Impedance Estimation for Grid-Tied VSI

The paper proposes a new stimulus for online active and parametric estimation of resistive-inductive grid impedance using a grid-connected inverter. The proposed stimulus is designed with the goal of minimizing invasiveness on the grid, minimizing the time required for estimation, thus minimizing computational calculations, and ultimately optimizing the result. The initial estimation provides only the total impedance using the Fourier transform. To derive parameter values for resistance and i...