A very simple linear folding architecture for subranging ADC is presented. The preprocessing analog structure is constituted with 2n (with n number of bits) parallel circuits made with a simple subtracting node and with a series of two MOS switches able to join the functionalities of DAC, summing node and amplifier typical of classical subranging ADC. To validate the idea an accurate simulation of the single channels and of the whole structure has been realized.

Leccese, F. (2011). A simplified cascade controlled channels for a 3 – bits discrete pure linear analog preprocessing folding ADC architecture. In International Workshop on ADC modeling, Testing and Data Converter Analysis and Design - IWADC 2011 (pp.61-66).

A simplified cascade controlled channels for a 3 – bits discrete pure linear analog preprocessing folding ADC architecture

LECCESE, Fabio
2011-01-01

Abstract

A very simple linear folding architecture for subranging ADC is presented. The preprocessing analog structure is constituted with 2n (with n number of bits) parallel circuits made with a simple subtracting node and with a series of two MOS switches able to join the functionalities of DAC, summing node and amplifier typical of classical subranging ADC. To validate the idea an accurate simulation of the single channels and of the whole structure has been realized.
2011
978-88-906201-0-2
978-161839279-4
Leccese, F. (2011). A simplified cascade controlled channels for a 3 – bits discrete pure linear analog preprocessing folding ADC architecture. In International Workshop on ADC modeling, Testing and Data Converter Analysis and Design - IWADC 2011 (pp.61-66).
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Utilizza questo identificativo per citare o creare un link a questo documento: https://hdl.handle.net/11590/181574
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