This paper presents a novel 3D packaging technique for integrating large 2-D Piezoelectric Micromachined Ultrasonic Transducer (PMUT) arrays with front-end circuits using a hybrid approach. This method allows the separate fabrication of the MEMS and ASICs, offering increased design flexibility and improved production yield. The packaging process involves flip-chip bonding of a 2-D PMUT array to a Fan-Out Wafer-Level Package (FOWLP) containing front-end ASICs. A 64×64 PMUT array, operating at 2 MHz with 80% two-way bandwidth, was fabricated and connected to a FOWLP housing 4 dummy ASICs. These ASICs were designed to form a 64×4-element 1.5-D array by electrically connecting, in the elevation direction, two symmetric groups of 8 adjacent PMUT array elements. The resulting electro-acoustic module (EAM) was mounted on a rigid-flex PCB and integrated in a probe head. Electrical impedance and acoustic tests confirmed the reliability and repeatability of the 3D packaging technique.

Savoia, A.S., La Mura, M., Dehghan Pir, M.M., Boni, E., Ramalli, A., Tortoli, P., et al. (2024). Advanced 3-D Packaging for Integrated 2-D PMUT Arrays and Front-End Circuits. In IEEE Ultrasonics, Ferroelectrics, and Frequency Control Joint Symposium, UFFC-JS 2024 - Proceedings (pp.1-4). 345 E 47TH ST, NEW YORK, NY 10017 USA : Institute of Electrical and Electronics Engineers Inc. [10.1109/UFFC-JS60046.2024.10793875].

Advanced 3-D Packaging for Integrated 2-D PMUT Arrays and Front-End Circuits

Savoia A. S.;La Mura M.;Dehghan Pir M. M.;
2024-01-01

Abstract

This paper presents a novel 3D packaging technique for integrating large 2-D Piezoelectric Micromachined Ultrasonic Transducer (PMUT) arrays with front-end circuits using a hybrid approach. This method allows the separate fabrication of the MEMS and ASICs, offering increased design flexibility and improved production yield. The packaging process involves flip-chip bonding of a 2-D PMUT array to a Fan-Out Wafer-Level Package (FOWLP) containing front-end ASICs. A 64×64 PMUT array, operating at 2 MHz with 80% two-way bandwidth, was fabricated and connected to a FOWLP housing 4 dummy ASICs. These ASICs were designed to form a 64×4-element 1.5-D array by electrically connecting, in the elevation direction, two symmetric groups of 8 adjacent PMUT array elements. The resulting electro-acoustic module (EAM) was mounted on a rigid-flex PCB and integrated in a probe head. Electrical impedance and acoustic tests confirmed the reliability and repeatability of the 3D packaging technique.
2024
Savoia, A.S., La Mura, M., Dehghan Pir, M.M., Boni, E., Ramalli, A., Tortoli, P., et al. (2024). Advanced 3-D Packaging for Integrated 2-D PMUT Arrays and Front-End Circuits. In IEEE Ultrasonics, Ferroelectrics, and Frequency Control Joint Symposium, UFFC-JS 2024 - Proceedings (pp.1-4). 345 E 47TH ST, NEW YORK, NY 10017 USA : Institute of Electrical and Electronics Engineers Inc. [10.1109/UFFC-JS60046.2024.10793875].
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Utilizza questo identificativo per citare o creare un link a questo documento: https://hdl.handle.net/11590/510625
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